Peculiarities to ensure fault tolerance of memristor-based neural networks on circuit structural-functional level

  • Сергей Николаевич Данилин Murom Institute (branch) Federal state budgetary Educational Institution of Higher Education "Vladimir State University named after Alexader Grigoryevich and Nickolay Grigoryevich Stoletovs"
  • Антон Дмитриевич Зуев Murom Institute (branch) Federal state budgetary Educational Institution of Higher Education "Vladimir State University named after Alexader Grigoryevich and Nickolay Grigoryevich Stoletovs"

Abstract

Currently, leading Russian and foreign developers and manufacturers of computing tools are carrying out large-scale activities in the sphere of artificial cognitive systems, which are necessary for implementation of neuromorphic devices for various purposes. This phenomenon is due to their potential advantages in accuracy, fault tolerance, fast performance, reliability, power consumption compared to information systems with sequential information processing technologies. However, nominal quality of artificial neural networks (ANN) achieved at computer modeling stage is significantly reducing during their engineering implementation. The article is concerned with the problem of ensuring high fault tolerance (FT) of memristor-based artificial neural networks (MBANN) that are hardware implemented. The primary task within the above problem is to preserve the assigned fault tolerance and accuracy of MBANN operation when passing from computer models to real devices due to impact of additional external and internal negative factors. Known general-circuit solutions of the problem, their weak and strong points are examined. The general approach developed by the authors was applied to make and operate MBANN, further detailed FT definition was given for memristors, neurons and ANN based on them. A package of passive and active methods is proposed and carried out to increase fault tolerance on levels of base implementation for neurons and MBANN as an information system. Author-developed hardware design implementation is proposed for fault-tolerant MBANN taught for recognition and nonlinear classification of several types of biological signals. MBANN has a multilayer perceptron architecture, which is hardware implemented using Russian passive matrices of metal-oxide memristors with crossbar topology. Practical application of author's inventions enables to efficiently improve known and to synthesize new technologies of passive or active matrices ensuring fault tolerance for current and upcoming MBANN.

Author Biographies

Сергей Николаевич Данилин, Murom Institute (branch) Federal state budgetary Educational Institution of Higher Education "Vladimir State University named after Alexader Grigoryevich and Nickolay Grigoryevich Stoletovs"

Candidate of  Technical Sciences, Associate Professor, Department of Software Engineering, Murom Institute (Branch) “Vladimir State University named after A.G. and N.G. Stoletov”

Антон Дмитриевич Зуев, Murom Institute (branch) Federal state budgetary Educational Institution of Higher Education "Vladimir State University named after Alexader Grigoryevich and Nickolay Grigoryevich Stoletovs"

Engineer, Department of Software Engineering, Murom Institute (Branch) “Vladimir State University named after A.G. and N.G. Stoletov”.

Published
2020-01-08
How to Cite
ДАНИЛИН, Сергей Николаевич; ЗУЕВ, Антон Дмитриевич. Peculiarities to ensure fault tolerance of memristor-based neural networks on circuit structural-functional level. Radioengineering and telecommunication systems, [S.l.], n. 4, p. 32-43, jan. 2020. ISSN 2221-2574. Available at: <https://rts-md.mivlgu.ru/jornalRTS/article/view/168>. Date accessed: 22 aug. 2025.
Section
Network and telecommunication