Algorithm for mathematical modeling of the noise characteristics of an integrated PLL chip
Abstract
This article presents an algorithm for mathematical modeling of the power spectral density (PSD) of phase noise of an integrated frequency synthesizer based on a phase-locked frequency (PLL) system. The resulting model allows us to estimate the level of phase noise of the synthesizer for any reference and output frequencies.
Published
2024-07-08
How to Cite
ЯКИМЕНКО, Кирилл Александрович; ПОПКОВ, Олег Владимирович; КОЛПАКОВ, Андрей Дмитриевич.
Algorithm for mathematical modeling of the noise characteristics of an integrated PLL chip.
Methods and devices of information transmission and processing, [S.l.], n. 25, p. 37-42, july 2024.
ISSN 2311-598X.
Available at: <https://rts-md.mivlgu.ru/MDjornal/article/view/448>. Date accessed: 23 aug. 2025.
Section
The analysis of signals and systems